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The badass tutorial for creating makefiles!

Tutorial 3: basic targets

In this step i will go through how to use targets!

In this tutorial just copy or reuse the files and folder from the previous tutorial.

Change the contents of the makefile to this:

#Another simple makefile.

VARIABLE1 = gcc
VARIABLE2 = prog

all:
	$(VARIABLE1) $(VARIABLE2).c -o $(VARIABLE2)
	
run: all
	./$(VARIABLE2)

Try to run with:

make

Uh???

This time, its not the same output. What you should get is:

gcc prog.c -o prog

So, how to run it?

Run this:

try to run this instead of make:

make run

That should be enough to satisfy your needs

What happened?

run depends on all to be executed, and because all has not been excuted then it will run all too. This time you should expect to get the same output as the previous tutorials.

If you instead of make run try make all you should then expect to get the same as make. If you just run make then it will execute the first target, which in this case is make all or the target all.

See also:

  • Rule syntax
  • Last modified: 04 October 2016 11:25:39. | CaF2 © (All rights reserved)