In this step i will go through how to use variables!
In this tutorial just copy or reuse the files and folder from the previous tutorial.
Change the contents of the makefile to this:
#Another simple makefile.
VARIABLE1 = gcc
VARIABLE2 = prog
all:
$(VARIABLE1) $(VARIABLE2).c -o $(VARIABLE2)
./$(VARIABLE2)
After that just execute as in the previous tutorial with:
make
The result you should get this time should be the same, eg:
gcc prog.c -o prog
./prog
Hello World!
It just swapped the $(VARIABLE1) to gcc and $(VARIABLE2) to prog. So $(VARIABLE1) $(VARIABLE2).c -o $(VARIABLE2) became gcc prog.c -o prog.